In high speed IO signaling, the matching of impedances between a driver and channel is critical for effective operation. Mismatch of impedance results in a signal reflection, while proper impedance matching minimizes this signal reflection.
In conventional operation, a system commonly employs a dedicated impedance control circuit, also known as an R-Comp, to calibrate the driver impedance to a design value. The R-Comp employs an external high precision resistor on board to tune an on-chip resistor. The tuned on-chip resistor may then be replicated to all data-lanes.
While the R-Comp will allow for impedance tuning, this technique has several limitations. The R-Comp is an added cost to the package and platform because an extra package pin and a high precision resistor are required for each I/O family that is to be matched, where there are commonly 5 to 10 I/O families for a typical SOC (System on Chip) product. A replica of the R-comp impedance to data lanes may introduce a large error due to the significant silicon variation, especially for the cutting edge silicon process. If the impedance replica fails, a system may be forced to resort to per-lane R-comp, which is cost prohibitive.
Further, the driver impedance is only matched by the R-Comp to a particular design value, which is typically equal to the nominal channel impedance. However, in a real world channel there are manufacturing variations (commonly about 15%) that affect channel impedance. In addition, there are impedance discontinuities that will further affect the channel impedance. The R-Comp concept cannot effectively account for these types of non-idealities.